PIC32MZ tutorial -- 32-bit Timer

　　The microcontroller is PIC32MZ2048ECH144 on the PIC32MZ EC Starter Kit. This microcontroller has four 32-bit synchronous timers are available by combining Timer2 with Timer3, Timer4 with Timer5, Timer6 with Timer7, and Timer8 with Timer9. The 32-bit timers can operate in one of three modes:

•Synchronous internal 32-bit timer
•Synchronous internal 32-bit gated timer
•Synchronous external 32-bit timer

　　At the moment, I accomplish the 32-bit timer with combining Timer2 and Timer3, and let it operates in synchronous internal 32-bit timer. I enable the 32-bit timer interrupt. In a 32-bit timer configuration, it‘s the odd numbered interrupt that fires. In this case, it‘s the Timer3 interrupt. You can see that in the following interface.

　　The first, configuration bits in CFB.h

// DEVCFG3　　BFFFFFFF
// USERID = No Setting
#pragma config FMIIEN = ON // Ethernet RMII/MII Enable (MII Enabled) // need a 25MHz XTAL in MII mode, a 50MHz Clock in RMII mode.
#pragma config FETHIO = ON // Ethernet I/O Pin Select (Default Ethernet I/O)
#pragma config PGL1WAY = ON // Permission Group Lock One Way Configuration (Allow only one reconfiguration)
#pragma config PMDL1WAY = ON // Peripheral Module Disable Configuration (Allow only one reconfiguration)
#pragma config IOL1WAY = ON // Peripheral Pin Select Configuration (Allow only one reconfiguration)
#pragma config FUSBIDIO = OFF // USB USBID Selection (Controlled by Port Function)

// DEVCFG2　　7FF9B11A
#pragma config FPLLIDIV = DIV_3 // System PLL Input Divider (3x Divider)
#pragma config FPLLRNG = RANGE_5_10_MHZ // System PLL Input Range (5-10 MHz Input)
#pragma config FPLLICLK = PLL_POSC // System PLL Input Clock Selection (POSC is input to the System PLL)
#pragma config FPLLMULT = MUL_50 // System PLL Multiplier (PLL Multiply by 50) //PLL must output between 350 and 700 MHz
#pragma config FPLLODIV = DIV_2 // System PLL Output Clock Divider (2x Divider)
#pragma config UPLLFSEL = FREQ_24MHZ // USB PLL Input Frequency Selection (USB PLL input is 24 MHz)
#pragma config UPLLEN = OFF // USB PLL Enable (USB PLL is disabled)

// DEVCFG1　　7F7F3839
#pragma config FNOSC = SPLL // Oscillator Selection Bits (System PLL)
#pragma config DMTINTV = WIN_127_128 // DMT Count Window Interval (Window/Interval value is 127/128 counter value)
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (Disable SOSC)
#pragma config IESO = OFF // Internal/External Switch Over (Disabled)
#pragma config POSCMOD = EC // Primary Oscillator Configuration (External clock mode)
#pragma config OSCIOFNC = ON // CLKO Output Signal Active on the OSCO Pin (Enabled)
#pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Clock Switch Disabled, FSCM Disabled)
#pragma config WDTPS = PS1048576 // Watchdog Timer Postscaler (1:1048576)
#pragma config WDTSPGM = STOP // Watchdog Timer Stop During Flash Programming (WDT stops during Flash programming)
#pragma config WINDIS = NORMAL // Watchdog Timer Window Mode (Watchdog Timer is in non-Window mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled)
#pragma config FWDTWINSZ = WINSZ_25 // Watchdog Timer Window Size (Window size is 25%)
#pragma config DMTCNT = DMT31 // Deadman Timer Count Selection (2^31 (2147483648))
#pragma config FDMTEN = OFF // Deadman Timer Enable (Deadman Timer is disabled)

// DEVCFG0　　FFFFFFF7
#pragma config DEBUG = OFF // Background Debugger Enable (Debugger is disabled)
#pragma config JTAGEN = ON // JTAG Enable (JTAG Port Enabled)
#pragma config ICESEL = ICS_PGx2 // ICE/ICD Comm Channel Select (Communicate on PGEC2/PGED2)
#pragma config TRCEN = ON // Trace Enable (Trace features in the CPU are enabled)
#pragma config BOOTISA = MIPS32 // Boot ISA Selection (Boot code and Exception code is MIPS32)
#pragma config FECCCON = OFF_UNLOCKED // Dynamic Flash ECC Configuration (ECC and Dynamic ECC are disabled (ECCCON bits are writable))
#pragma config FSLEEP = OFF // Flash Sleep Mode (Flash is powered down when the device is in Sleep mode)
#pragma config DBGPER = ALLOW_PG2 // Debug Mode CPU Access Permission (Allow CPU access to Permission Group 2 permission regions)
#pragma config EJTAGBEN = NORMAL // EJTAG Boot (Normal EJTAG functionality)

// DEVCP0
#pragma config CP = OFF // Code Protect (Protection Disabled)

// SEQ0

// DEVADC1

// DEVADC2

// DEVADC3

// DEVADC4

// DEVADC5

　　The second, T32 implementation in T32.c (the 32-bit timer is set to overflow and make interrupt every second).

void T32_Init(void)
{
    T2CON = 0x0;
    T3CON = 0x0;
    TMR2 = 0;
    TMR3 = 0;

    IPC3SET = 0x50000;
    IEC0SET = 0x4000;
    IFS0CLR = 0x4000;

    PR3 = 0x05F5;
    PR2 = 0xE100;

    T2CON = 0x8008;
}

void T32_Write(unsigned long value)
{
    TMR3 = (unsigned int)(value>>16);
    TMR2 = (unsigned int)value;
}

unsigned long T32_Read(void)
{
    return (((unsigned long)TMR3 << 16) | TMR2);
}

　　The last, main function and interrupt service routine.

#include <sys/attribs.h>
#include "T32.h"
#include "CFB.h"

#define LED_IOCTL()       TRISHCLR = (1<<0)
#define LED_SETON()       LATHSET = (1<<0)
#define LED_SETOFF()      LATHCLR = (1<<0)
#define LED_ONOFF()       LATHINV = (1<<0)
#define LED_OPEN()        ANSELH &= 0xFFFFFFFE

#define Mvec_Interrupt() INTCONSET = 0x1000; asm volatile("ei")

void __ISR(_TIMER_3_VECTOR,ipl1AUTO) T32_Handler(void)
{
    LED_ONOFF();
    T32_Write(0);
    IFS0CLR = 0x4000;
}
void main(void)
{
    LED_OPEN();
    LED_IOCTL();
    T32_Init();
    Mvec_Interrupt();
    while(1)
    {
        ; // do nothing
    }
}