Operating System: Three Easy Pieces --- Load-Linked and Store-Conditional (Note)

Some platforms provide a pair of instructions that work in concert to help build critical sections.

On the MIPS architecture, for example, the load-linked and store-conditional instructions can be

used in tandem to build locks and other concurrent structures. The C pseudocode for these

instructions is as found in figure 28.5. Alpha, PowerPC, and ARM provide similar instructions.

The load-linked operates much like a typical load instruction, and simply fetches a value from

memory and places it in a register. The key difference comes with the store-conditional, which

only succeeds and updates the value stored at the address just load-linked from if no intervening

store to the address has taken place. In the case of success, the store-conditional returns 1 and

updates the value at ptr to value; if it fails, the value at ptr is not updated and 0 is returned.

时间： 2024-10-10 13:25:54

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