Verilog实现4位数码北京快乐8平台出租管动态显示（FPGA）

本文北京快乐8平台出租haozbbs.comQ1446595067 提供了在Basys2开发板上实现4位数码管动态显示的代码，并在ISE13.4_1上调试通过，下载到开发板后可实现将8个SW输入的两位十六进制数对应的8421BCD码，显示在数码管上。

首先，是以十六进制数显示。比如，在8个开关SW上输入2FH，四个数码管从左到右显示0215。

以下为代码：

module x7seg_1(
    input wire [3:0] high_data,
    input wire [3:0] low_data,
    input wire clk,
    output reg [6:0] led,
    output reg [3:0] en
    );  

    reg [3:0] data;
    reg [16:0] times;  

    initial times = 0;  

    always @ (posedge clk)
      begin
      if(times == 80000)
        times = 17‘b0;
        else times = times + 17‘b1;
        end

    always @ (posedge clk)
      begin
      if(times<=20000)
          begin
          en=4‘b1110;
          if(low_data>4‘b1001)
            data=low_data-4‘b1010;
          else data=low_data;
          end
       else if((times>20000)&(times<=40000))
          begin
          en=4‘b1101;
          if(low_data>4‘b1001)
            data=4‘b0001;
          else data=4‘b0000;
          end
        else if((times>40000)&(times<=60000))
          begin
          en=4‘b1011;
          if(high_data>4‘b1001)
            data=high_data-4‘b1010;
          else data=high_data;
          end
        else
          begin
          en=4‘b0111;
          if(high_data>4‘b1001)
            data=4‘b0001;
          else data=4‘b0000;
          end
        end

         [email protected](*)
         begin
       case(data)
          4‘b0000: led= 7‘b1000000;  //0
          4‘b0001: led = 7‘b1111001;  //1
          4‘b0010: led = 7‘b0100100;  //2
          4‘b0011: led = 7‘b0110000;    //3
          4‘b0100: led = 7‘b0011001;  //4
          4‘b0101: led = 7‘b0010010;  //5
          4‘b0110: led = 7‘b0000010;  //6
          4‘b0111: led = 7‘b1111000;  //7
          4‘b1000: led = 7‘b0000000;    //8
          4‘b1001: led = 7‘b0010000;  //9
          default: led = 7‘b0001000;  //A  

       endcase
       end
endmodule   

约束文件如下：

NET"low_data[0]"LOC=P11;
NET"low_data[1]"LOC=L3;
NET"low_data[2]"LOC=K3;
NET"low_data[3]"LOC=B4;
NET"high_data[0]"LOC=G3;
NET"high_data[1]"LOC=F3;
NET"high_data[2]"LOC=E2;
NET"high_data[3]"LOC=N3;
NET"led[0]"LOC=L14;
NET"led[1]"LOC=H12;
NET"led[2]"LOC=N14;
NET"led[3]"LOC=N11;
NET"led[4]"LOC=P12;
NET"led[5]"LOC=L13;
NET"led[6]"LOC=M12;
NET"en[0]"LOC=F12;
NET"en[1]"LOC=J12;
NET"en[2]"LOC=M13;
NET"en[3]"LOC=K14;
NET"clk"LOC=B8;

其次，将8个SW输入的两位十六进制数对应的十进制数显示在数码管上。比如，输入7FH，四个数码管从左到右依次显示127。

在将二进制数转换为十进制数时，我采用的是”左移加三“的方式，下载后测试正常工作。

原文地址：http://blog.51cto.com/13862278/2139919