https://www.cnblogs.com/jintianfree/archive/2010/03/16/1687540.html#3841218
快速补充关于内存的一些基础知识，主要是为了理解DPDK，没有涉及太深。
简介
RAM (random access memory) 随机存取存储器，随机存取是指存储单元的内容可按需要随意取出或存入，且存取的速度与存储单元的位置无关。
RAM分为SRAM(static random access memory)和DRAM(dynamic random access memory)，
SRAM结构复杂，单位面积容量少，存取速度快；
DRAM结构简单，单位面积容量多，存储速度慢。
DRAM因为结构简单，存储的电荷会随着时间渐渐消失，因此需要有个再充电(refresh)的动作保持储存的数据。
SRAM适合做寄存器和CPU缓存。DRAM则适合做主存及其他硬件装置的缓存
主存（通常所说的内存）结构层次
主存DRAM由大至小，由上往下可做以下拆分：
channel > DIMM > rank > chip > bank > row / column
主存从channel到chip的对应关系
Chip往下拆分
Bank往下拆就是一个个的储存单元，横向为row，纵向为column。每个column下方有一个row buffer，用于缓存读出的数据。
channel
In the past, memory speeds were able to keep up with the processor‘ s requirements.However, when we reached the point where the processor‘ s ability to process data was accelerating faster than current memory technologies could support, memory became a major limitation in system performance. Simply put, memory speeds could no longer keep up with advances in processor speeds and data throughput. A new method to get more data to the processor in mainstream computers was needed – without relying solely on memory speed.
Intel and many system architects decided that the solution was to add a second channelof memory – called the "dual channel" memory layout.
A processor in a computer is like the engine of a car. A car needs gasoline to fuel its engine. Similarly, a computer processor needs memory storage to process its data. Data (in bits which are zeros and ones) must be stored in memory first, before being delivered to the processor. When more data can be delivered to the processor via memory at faster speeds, the processor can manipulate instructions and data more efficiently and ultimately, the requested task can be accomplished in less time.
To illustrate the difference between single- and dual-channel memory, let‘ s extend the analogy above. Data is filled into a funnel (memory); the funnel then "channels" the data through its pipe to the processor‘ s input: In this illustration, single-channel memory is like a funnel that feeds data to the processor engine through a single pipe. Data is transferred 64 bits at a time.
Dual-channel memory utilizes two funnels (and thus two pipes) to feed data to the processor, thereby being able to deliver up to twice the data of the single funnel. With two funnels or channels, data is transferred 128 bits at a time. The process works the same way when data is "emptied" from the processor by reversing the flow of data. To prevent the funnel from being over-filled with data or to reverse the flow of data through the funnel, there is a "traffic" controller shown as a valve on the funnel‘ s pipe. In computers, there is a special chip called the "Memory Controller" that handles all data transfers involving the memory modules and the processor.
The Memory Controller manages all movement of data between the processor and the memory modules. Data is sent to the Memory Controller (which is part of a computer motherboard‘ s "chipset"). The Memory Controller is like a traffic signal that regulates data transfer either to memory modules for storage, or to the processor for data manipulation or "crunching". Graphically, this architecture is pictured below:
Data moves through the funnel‘ s pipe in one direction at a time (just like a one-lane bridge that can be used in both directions, but only one car can cross it at a time). The memory controller acts like a traffic signal that directs the movement of data across the memory channel. For example, data arriving to the Memory Controller is first stored in the memory modules (2), then is re-read (3) and finally transferred to the processor (4). On a typical motherboard, these same components can be easily identified:
DIMM
DRAM芯片包装在存储器模块(memory module)中，它是插到主板的扩展槽上的。常见的包装是168个引脚的双列直插存储器模块(Dual inline memory module,DIMM)，它以64位为块传送数据到存储控制器和从存储控制器传出数据。DIMM是在单列直插存储器模块(single inline memory module,SIMM)发展起来的，SIMM以32位为块传送数据。
rank
内存控制器只允许CPU每次只能与内存进行一组64bits的数据交换，这一个64bit的带宽就是一个rank，即1rank = 64bits。内存数据读写每次是64bits的一个数据宽度，ECC内存增加了8bit的校验位，因此ECC内存是72bits。
内存上的每个内存颗粒(chip)，提供4bit/8bit的数据，提供4bit的芯片记作x4，提供8bit的芯片记作x8，为了组成一个rank，内存需要有16片x4的芯片或者8片x8的芯片（没有x4和x8的芯片混搭的情况）。所以，一条DIMM上至少有8颗内存颗粒，排列在DIMM的一面或两面上。标准的DIMM的每一面有足够的空间容纳第9颗芯片，第9颗芯片用来存储4bits或8bits的ECC.。
如果1根ECC DIMM的9颗芯片都位于DIMM的同一面，就叫做single-sided，如果9颗芯片分布在DIMM的两面，就叫做double-sided。
DIMM还被分为single-rank、double-rank、quad-rank（也就是我们在内存的lable上经常能看到的1R、2R、4R，4R的DIMM一般用在server上面）。
double-rank的每一个rank都可以独立的提供64bit的数据，DIMM需要有两个片选信号，选择使用哪个rank，选中的rank，数据会经过MUX输出，或经过MUX输入。同样quad-rank有四个rank，可以提供4组64bit的数据，需要四个片选信号选择使用哪个rank。
Channel是为了快，多个DIMM可以增大内存，多个rank是为了什么？目前我只查到了以下描述，尚不能确定。
Most companies prefer to use more chips, because this gives the DRAM more processing power and more areas in which to store data.As of 2011, there are four types of rank: single or one layer, dual or two layers, quad or four layers and octal or eight layers. The more layers, the more memory the company can fit onto a chip. Commonly, consumers only find single- or dual-layer memory in their computers, while powerful server computers make use of the quad- and octal-layer ranked memory chips.
原文链接：
参考资料：
圖解RAM結構與原理，系統記憶體的Channel、Chip與Bank
Intel Dual Channel DDR Memory Architecture
原文地址：https://www.cnblogs.com/jinanxiaolaohu/p/9824959.html