ULK --- Chap 4: Interrupts and Exceptions (Note)

The Intel documentation classifies interrupts and exceptions as follows:

1. Interrupts:

Maskable interrupts: All Interrupt ReQuests (IRQs) issued by I/O devices give rise to maksable

interrupts. A maskable interrupt can be in two states: maksed or unmasked; a masked interrupt

is ignored by the control unit as long as it remains masked.

Nonmaskable Interrupts: Only a few critical events (such as hardware failures) give rise to non-

maskable interrupts. Nonmaskable interrupts are always recognized by the CPU.

2. Exceptions

(1) Processor-detected exceptions: Generated when the CPU detects an anomalous condition while

executing an instruction. These are further divided into three groups, depending on the value of

the eip register that is saved on the Kernel Mode Stack when the CPU control unit raises the

exception.

Faults: Can generally be detected; once occurred, the program is allowed to restart with no loss of

continuity. The saved value of eip is the address of the instruction that causes the fault, and hence

that instruction can be resumed when the exception handler terminates. As we will see in the section

Page Fault Exception Handler, resuming the same instruction is necessary whenever the handler is

able to correct the anomalous condition that caused the exception.

Traps: Reported immediately following the execution of the trapping instruction; after the kernel

returns control to the program, it is allowed to continue its execution with no loss of continuity. The

saved value of eip is the address of the instruction that should be executed after the one that caused

the trap. A trap is triggered only when there is no need to reexecute the instruction that terminated.

The main use of traps is for debugging purpose. The role of the interrupt signal in this case is to

notify the debugger that a specific instruction has been executed (for instance, a breakpoint has been

reached within a program). Once the user has examined the data provided by the debugger, she may

ask that execution of the debugged program resume, starting from the next instruction.

Aborts: A serious error occurred; the control unit is in trouble, and it may be unable to store in the eip

register the precise location of the instruction causing the exception. Aborts are used to report severe

errors, such as hardware failures and invalid or inconsistent values in system tables. The interrupt signal

sent by the control unit is an emergency signal used to switch control to the corresponding abort exception

handler. This handler has no choice but to force the affected process to terminate.

(2) Programmed Exceptions

Occur at the request of the programmer. They are triggered by int or int3 instruction; the into (check for

overflow) and bound (check on address bound) instructions also give rise to a programmed exception when

the condition they are checking is not true. Programmed exceptions are handled by the control unit as traps;

they are often called software interrupts. Such exceptions have two common uses: to implement system calls

and to notify a debugger of a specific event.

Each interrupt or exception is identified by a number ranging from 0 to 255; Intel calls this 8-bit unsigned

number a vector. The vectors of nonmakable interrupts and exceptions are fixed, while those of maskable

interrupts can be altered by programming the Interrupt Controller.

时间: 2024-10-26 23:12:06

ULK --- Chap 4: Interrupts and Exceptions (Note)的相关文章

ULK --- Chap 4: Interrupts and Exceptions

An interrupt is usually defined as an event that alters the sequence of instructions executed by a processor. Such events correspond to electrical signals generated by hardware circuits both inside and outside chip. Interrupts are often divided into

ULK --- Chap 4: Softirqs and Tasklets (Note)

We mentioned earlier in the section "Interrupt Handling" that several tasks among those executed by the kernel are not critical: they can be deferred for along period of time, if necessary. Remember that the interrupt service routines of an inte

ULK --- Chap 4: Tasklets (Note)

Tasklets are the preferred way to implement deferrable functions in I/O drivers. As already explained, tasklets are built on top of two softirqs named HI_SOFTIRQ and TASKLET_SOFTIRQ. Several tasklets may be associated with the same softirq, each task

Checked Exceptions

记得当年在程序员杂志上看出这次访谈,10多年过去了, 这件事儿最近被重提了, 原因是 Kotlin. 1.对Checked Exceptions特性持保留态度 (译者注:在写一段程序时,如果没有用try-catch捕捉异常或者显式的抛出异常,而希望程序自动抛出,一些语言的编译器不会允许编译通过,如Java就是这样.这就是Checked Exceptions最基本的意思.该特性的目的是保证程序的安全性和健壮性.Zee&Snakey(MVP)对此有一段很形象的话,可以参见: http://www.b

Linux Kernel - Debug Guide (Linux内核调试指南 )

http://blog.csdn.net/blizmax6/article/details/6747601 linux内核调试指南 一些前言 作者前言 知识从哪里来 为什么撰写本文档 为什么需要汇编级调试 ***第一部分:基础知识*** 总纲:内核世界的陷阱 源码阅读的陷阱 代码调试的陷阱 原理理解的陷阱 建立调试环境 发行版的选择和安装 安装交叉编译工具 bin工具集的使用 qemu的使用 initrd.img的原理与制作 x86虚拟调试环境的建立 arm虚拟调试环境的建立 arm开发板调试环

[蓝牙] 5、Battery Service module

Detailed Description This module implements the Battery Service with the Battery Level characteristic. During initialization it adds the Battery Service and Battery Level characteristic to the BLE stack database. Optionally随意地 it can also add a Repor

linux内核调试指南

linux内核调试指南 一些前言 作者前言 知识从哪里来 为什么撰写本文档 为什么需要汇编级调试 ***第一部分:基础知识*** 总纲:内核世界的陷阱 源码阅读的陷阱 代码调试的陷阱 原理理解的陷阱 建立调试环境 发行版的选择和安装 安装交叉编译工具 bin工具集的使用 qemu的使用 initrd.img的原理与制作 x86虚拟调试环境的建立 arm虚拟调试环境的建立 arm开发板调试环境的建立 gdb基础 基本命令 gdb之gui gdb技巧 gdb宏 汇编基础--X86篇 用户手册 AT&

【译】x86程序员手册25-7.1任务状态段

7.1 Task State Segment 任务状态段 All the information the processor needs in order to manage a task is stored in a special type of segment, a task state segment (TSS). Figure 7-1 shows the format of a TSS for executing 80386 tasks. (Another format is used

【译】x86程序员手册26-7.5任务切换

7.5 Task Switching 任务切换 The 80386 switches execution to another task in any of four cases: 80386在以下四种情况下会切换另一个任务去执行: The current task executes a JMP or CALL that refers to a TSS descriptor. 当前任务执行了一个引用了TSS描述符的JMP或CALL. The current task executes a JMP